randy melton : seadevil@gmail.com

Tcl Publications:

   1.  ''02 Oct 2009'' - embedded.com: Using Tcl to create a virtual component in Verilog [http://embedded.com/design/opensource/220300794] (That links seems dead, try this one instead: http://www.eetimes.com/design/industrial-control/4008808/Using-Tcl-to-create-a-virtual-component-in-Verilog)



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