risc-v assembler

Difference between version 3 and 4 - Previous - Next
A https://riscv.org/%|%risc-v%|% assembler in Tcl : https://github.com/jbroll/riscv-asm%|%code on github%|%
This project now encompasses a simple RISC-V assembler that supports rv32Gc and rv64Gc, wa disassembler for the samever that 
will stload ELF and an execution emulator that can load
 ELF and executen the rv32/64 IM tests ions. the Iriscv-tests repo.  
The output of the assembler is still a primitive listing with source line, address and
 bytes in hex.  ItThe disassembler and 
execution can now load the assembler listing out cpurrt. It still does notly support writing ELF.
Floating point support has been started, but development is stalled.  Using Tcl's floats to emulate floating 
point at the bit compatibility level required to pass the test suite is a bit complex.

Instruction sets and extensions:
   * rv32G (IMAFD_Zicsr_Zifencei)
   * rv64G (IMAFD_Zicsr_Zifencei)
   * C - Compressed instructions
   * E - 16 registers
   * Q - Quad floats
   * Zfinx - Floats in X registers

A very simple example.rva is included.  Try `make example`

    $ make example
    ./rva.tcl -march rv32gc example.rva
     00005 0100 00C58533   add a0 a1 a2
     00006 0104 FFFFC297   auipc t0 top
     00006 0108 12E1       addi t0 t0 top
     00007 010A 8282       jalr x0 t0 0

The accepted instruction sets are defined in files sourced from the opcodes
directory.  These files derive from those available in the
https://github.com/riscv/riscv-opcodes%|%riscv/riscv-opcodes%|% repository, but
are highly edited.  Additional opcodes can be easily added by including X
extensions in the extensions directory and sourcing them by suffixing the
-march option with the extension name in the RISC-V accepted usage.

For example:

    rva.tcl -march rv32gc_Xaname

An opcode mnemonic instruction is a Tcl proc that calls 'assemble'.  A few
pseudo instructions are in macros.tcl and more can easily be added.  The macro
and alias syntax are slight simplifications of standard Tcl.  More complex
pseudo instructions benefit by being defined directly as procs.

The currently supported instructions are tested against the gnu gas assembler.
The tests are run with make invoking the test scripts.

    make test    make test-suite   # run the riscv-tests suite if located in an adjacent directory.

A few differences are still present with gas and rva.tcl compressing
slightly different sets of instructions and with referencing labels.