Bwise on the Parallella
A while ago I joined the aftermath of a Kickstarter project by a company called Adapteva, with as project a Xilinx Zynq chip (fast dual ARM core processor with powerful modern FPGA) together with their own multicore Risc chip on a small and very cheap board, with Usb host, giga ethernet and HD Hdmi connector.
The board, besides the programmable logic and the connected special 16 core processor chip, is Open Source (also the Fpga interfaces, the whole startup code, etc.), runs Linux, and can easily be persuaded to apt-get Tcl and Tk. For about 160 euros, you can plug in an Usb keyboard/mouse (though mine doesn't always recognize Usb at startup), connect your monitor, and run fun programs like Bwise.
I tested that to work good, so now I want to run my Bwise block functions on some of the small local memory but quite fast special chip cores. So that one blocks output will feed into the next blocks input, get synchronized, and make use of the small grained intercommunication of over 10GB/s IIRC.
Oct '017
I've made some simple examples for this cheap FPGA board, buttons to play with a LED connected to the breakout board using Linux GPIO commands wrapped in two bwise "shell" command blocks, requires using su to make the port available and set to the right direction and user writable (details if people would be interested), and a procedure type of block which takes two inputs values as input to the FPGA doing a multiply of those numbers, using "AXI-lite" based bus interface, reading the result back to BWise with a C program running on the ARM cores, more or less as provided by the example maker:
The FPGA "program", which can be based on C code using Xilinx's Vivado HLS, and incorporated in a project and chip compiled with the free tools. which run on tcl commands, can be changed and tested, and this whole example, the BWIse and the Tcl runs on the little board itself (on a remote X screen) using simply ssh -X .
Nov
Now, it's time to make another C-function example which compiles with the C-to-FPGA Vivado_hls (free) tools. For instance an automated path from a time function for audio waves, driving the whole compilation from a BWise graph (like I've made examples) but in this case including the Vivado tool (also uses Tcl), and loading the resulting FPGA program file as part of one long automated run. But, new for me to try, I'll start with a simple filter simulation C-program that must run in the FPGA and maybe be controlled from from a little Tk interface, for testing or maybe music synthesizer applications.