Master Slave Flip Flop

by Theo Verelst

Starting with the circuit for a ordinary flip flop, combined with a logical 'gating' circuit on its input, to be able to force both inputs to logical 1, making it remember its state, we can make a flip flop which can either be set to take over a 1-0 or a 0-1 input combination, or to remember its previous state ad infinitum.

Two such gated flip flops and an added inverter between the gate enable inputs can be put in series to get a master slave flip flop, which can be used a memory part of a finite state machine.

The master slave idea makes the circuit a clock edge triggered circuit, which changes state exactly once at each 0-->1 or 1-->0 clock signal change. That means that when the output of the master slave flip flop is somehow fed back to its input, preferably with some intermedeate function, the information will never 'race' around, but always change once at each clock pulse.

For state machines in software, this is usually automatic, because our processor cores neatly set memory places as we instruct them, but higher level programmed constructions may well suffer from similar phenomenea.

How do you program a flip switch (I know the answer, of course: set switchstate [expr !$switchstate]...)?

Feeding back the output of a master slave output to its input in inverted manner gives us the essential counter circuit, which changes state exactly once at each clock pulse or lets say state 'evaluation' step. A counter can be a combination of or one big state machine (asynchronous/ synchronous) consisting of more than one bit.

A counter circuit can be a very decent network of perfectly reasonable functions called NANDs, which are good and decent mathematical functions of very fundamental kind.