The 'tcmake' name was created especially for publishing :)
Last time I wanted to make some make's replacement, mostly to practise my knowledge in Tcl, and this is the effect.
The source can be obtained from: http://www.intercon.pl/~sektor/tcl/make.tcl
This is a "very beta" version and still needs some features to be added, but the basic functionality works well.
The makefile's syntax is almost the same simple as the syntax of the make's makefile. It supports also some symbols and automatic variables as the make tool.
The make.tcl script can be called with one target name, which is the first found rule by default. First it searches for the makefile, which must be named "Makefile.tcl" or "makefile.tcl". This must be a tcl script, which is sourced by make.tcl.
The Makefile.tcl is a normal Tcl script and you can program anything there, however the most important is creating rules. This can be done by use of two commands: rule and rules.
The rule command has the following syntax:
rule <target> <dependency>... <action>
After <target> there can be any number of dependencies and the last argument is the action. A typical structure of the "rule" command is:
rule f1.o f1.c f.h {
gcc -c f1.c
}Action consists of lines to execute, mostly by the shell (obtained from SHELL environment variable). Inside can be used global variables and also three automatic variables:
To define an action for multiple targets you can use 'rules' command:
rules <rule list> <action>
Typical use is:
rules {
{f1.o f1.c f.h}
{f2.o f2.c f.h}
} {
gcc -c $<
}Additionally, you can use any command defined in the make.tcl in your Makefile.tcl. For example:
And, of course, if you end your Makefile.tcl with 'exit' command, no normal action will be taken... :)
Options:
Options, like -v (verbose), -k (keep going) and -f (custom makefile name) are yet in plans (2004-10-17).
-k (keep going, even if some of command execution resulted in error)
Sektor
see also:
software build systems in Tcl, ynform.org