Bwise blocks connecting FPGA accelerated C functions

TV As a worthy addition to the BWise examples of using graphical flow based programming with Tcl/Tk I demonstrate a C function connected with a BWise flow being transformed into a FPGA program, connected with a live BWise graph and run on an embedded Linux system. The A.R.M. based Parallella board can also run the bwise application and can run for instance mat problems competitive with desktop computer speeds.

I use the latest Xilinx tools for Silicon Compilation, which happen to completely run from Tcl commands. The C function being transformed into an FPGA image dynamically loaded into the Zynq 7010 board is automatically turned into an AXIlite bus connected Verilog function by Vivado_hls, which requires little adaptation to a regular, complex C function with variables transferred by name, allowing any C control structure and includes C library functions like math calls.