Version 8 of LED display driven by the parallel port under tcl control

Updated 2005-09-09 09:47:05

by Theo Verelst

http://82.168.209.239/Wiki/led7seg1.jpg

Using the connection from applying the parallel port to drive a LED and read a switch from tcl, I extended the hardware a bit, nothing fancy, though I'm sure a bit more than most hobbyists will put together just like that, so I've taken time to make a schematic diagram, which makes for a nice little circuit under tcl control.

The image above is the purpose: 3 (I happend to have 3) 7 segment displays (including dot), under control of a tcl program, over a normal parallel port. Cost of the harware, depending on how you built it, I guess 20 $/E, I don't know exactly. The idea is that when you have a running computer it doesn't need to have its screen on to display a number, or, in my case, another, self built computer can use this display unit after it has been tested on a PC.

And its fun.

Assuming the cable from the page I mentioned, and the driver (when needed) from the parallel port page, I used 4 8 bit latch (memories/buffers) chips, in this case from the HC series, though one may want to use ttl (ls) logic, which should work fine, too, to store the data for all the segments of the displays, and to store in this case 3 control bits, to determine which display will be listening to the data bits of the printer port.

This is the schematic diagram of the circuit I built:

http://82.168.209.239/Wiki/displays_diagram.gif

I built it and tested it and with only 3 minor errors it worked easily. The diagram I made afterwards, that's maybe why I first made a little mistake in the design, which was easy to find and fix, the other problems were little (half) short circuits because of soldering wires hastely, that is not neatly.. Because the printer port is connected over resistors, that can never realy hurt.

I assumed a 5 Volt supply is present, I made one from a wall wart a standard 7805 regulator chip with heat sink.

I put the display part on a experimentors printed circuit board. The control memory is on a breadboard:

http://82.168.209.239/Wiki/led7seg2.jpg

Now we can use the above mentioned driver (or use direct parallel port access for similar control) to drive our display unit by tcl control:

 proc disnum { {n} } {
   # the numbers 0-9 in the coding for how I connected up the segments to the bits
   set dis {192 252 146 152 172 137 129 220 128 136}
   set a [string index $n end-2]
   set b [string index $n end-1]
   set c [string index $n end]

   # 'open' our control register
   lpt_wrctrl 0
   # select the rightmost display unit to become active
   lpt_wrdata 32
   # 'open' the display channel(s)
   lpt_wrctrl 1
   # figure out but pattern for the rightmost digit
   if {$c=={}} { set o 255 } { set o [lindex $dis $c] }
   # And write it to the display memory
   lpt_wrdata $o

   lpt_wrctrl 0
   lpt_wrdata 64
   lpt_wrctrl 1
   if {$b=={}} { set o 255 } { set o [lindex $dis $b] }
   lpt_wrdata $o

   lpt_wrctrl 0
   lpt_wrdata 128
   lpt_wrctrl 1
   if {$a=={}} { set o 255 } { set o [lindex $dis $a] }
   lpt_wrdata $o
 } 

 # count from 0 to 999 in 100 seconds:
 proc disnumat {t} {
    global n;
    disnum $n ; 
    incr n; 
    if {$n < 1000} {
       after $t "disnumat $t"
    }
 }
 # start at zero:
 set n 0
 # and count up every 10th second!
 disnumat 100

Works perfectly neat.


TV (14 Dec 2003) For those interested in the workings of the circuit, I'm starting a page on simulating latch behaviour in Bwise where also the actual circuits can be driven over bwise blocks as a simulation of the hardware in the longer run.


TV (sept 9 '05) I've lately been using programmable logic for which the following VHDL code would decode a 4 bits code to 7 segment data, except the elements are shifted and one order is different, this is for the FPGA (Xilinx/Digilent) demo board displays:

 library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;
 use IEEE.STD_LOGIC_ARITH.ALL;
 use IEEE.STD_LOGIC_UNSIGNED.ALL;

 --  Uncomment the following lines to use the declarations that are
 --  provided for instantiating Xilinx primitive components.
 --library UNISIM;
 --use UNISIM.VComponents.all;

 entity display3 is
     Port ( hex : in std_logic_vector(3 downto 0);
            segments : out std_logic_vector(7 downto 0));
 end display3;

 architecture Behavioral of display3 is
 begin
    with hex SELect
   segments <= "00000110" when "0001",   --1
         "01011011" when "0010",   --2
         "01001111" when "0011",   --3
         "01100110" when "0100",   --4
         "01101101" when "0101",   --5
         "01111101" when "0110",   --6
         "00000111" when "0111",   --7
         "01111111" when "1000",   --8
         "01100111" when "1001",   --9
         "01110111" when "1010",   --A
         "01111100" when "1011",   --b
         "00111001" when "1100",   --C
         "01011110" when "1101",   --d
         "01111001" when "1110",   --E
         "01110001" when "1111",   --F
         "00111111" when others;   --0

 end Behavioral;

Of course the comments are optional, and this kind of code can be automatically generated by tcl code, or lets say Bwise.


Category Device Control